1. Field of the Invention
The present disclosure generally relates to the field of electronics, and more particular to a semiconductor device.
2. Description of the Related Art
According as semiconductor devices have been highly integrated, three-dimensional packaging technologies for stacking chips have been developed. A through silicon via (TSV) technology is a packaging technology in which a via hole is formed through a silicon substrate and a via structure is formed therein.
Where a semiconductor device includes a TSV, the silicon substrate and other devices on the silicon substrate may be stressed during subsequent heat treatment processes since the via structure may have a coefficient of thermal expansion different from that of the silicon substrate and the reliability of the semiconductor device may deteriorate.
In addition, where the via structure includes a barrier layer pattern and a metal layer pattern, the stress due to the difference of the coefficients of thermal expansion may cause the barrier layer pattern to separate from the metal layer pattern.